PSN-L Email List Message

Subject: Re: low noise PSD
From: ChrisAtUpw@.......
Date: Sun, 16 May 2010 21:30:07 EDT


 
In a message dated 16/05/2010, cjburch@........... writes:

Here's a  technical question about seismometer electronics. What phase 
sensitive  detector design do you recommend for low noise?

I have built PSDs using  an op amp and FET switches (the amp switches 
between gain of +1 and -1).   Analog Technology and National Semi describe these 
circuits in application  notes. And you can use a switch with an 
instrumentation amp.  But these  switches produce huge high frequency noise pulses that 
are very difficult to  shield out or filter out.

You could also use IC multipliers like the  AD630 or a Gilbert cell 
multiplier. I have not tried either of these and  wonder if they are worth the cost 
and/or trouble of  construction.



Hi Chuck,
 
    It would be a help if you said exactly what you are  trying to do! I am 
slightly confused by your reference to multipliers when the  most common 
seismometer applications are detector systems and chopper  amplifiers!
    There are fairly low noise analogue FET switch ICs  available. One that 
I have used with a detector system is the four channel  LTC1043, which has 
an on chip RC oscillator, which can also be driven by a  CD4060 crystal 
oscillator for very high stability switching. There are  application notes 
available from Linear. This works nicely as a capacitative  position detector. I 
can see no reason why it should not be equally satisfactory  as a chopper 
amplifier. There is charge balancing applied to the switch  circuits.
    You do need to be careful about the switching rate  applied to any 
analogue amplifier ICs within a feedback loop.
    You need to check both temperature drift and noise  with multiplier 
circuits. 
    Check Karl and Allan's circuits on psn and Randall  Peters' websites?
    I hope that this helps.
 
    Regards,
 
    Chris Chapman





In a message dated 16/05/2010, cjburch@........... writes:
Here's a=20 technical question about seismometer electronics. What phase sensit= ive=20 detector design do you recommend for low noise?

I have built PSDs= using=20 an op amp and FET switches (the amp switches between gain of +1 and -1).=  =20 Analog Technology and National Semi describe these circuits in applicati= on=20 notes. And you can use a switch with an instrumentation amp.  But= these=20 switches produce huge high frequency noise pulses that are very difficul= t to=20 shield out or filter out.

You could also use IC multipliers like= the=20 AD630 or a Gilbert cell multiplier. I have not tried either of these and= =20 wonder if they are worth the cost and/or trouble of=20 construction.
Hi Chuck,
 
    It would be a help if you said exactly what= you are=20 trying to do! I am slightly confused by your reference to multipliers when= the=20 most common seismometer applications are detector systems and chopper=20 amplifiers!
    There are fairly low noise analogue FET switc= h ICs=20 available. One that I have used with a detector system is the four channel= =20 LTC1043, which has an on chip RC oscillator, which can also be driven by= a=20 CD4060 crystal oscillator for very high stability switching. There are=20 application notes available from Linear. This works nicely as a capacitati= ve=20 position detector. I can see no reason why it should not be equally satisf= actory=20 as a chopper amplifier. There is charge balancing applied to the switch=20 circuits.
    You do need to be careful about the switching= rate=20 applied to any analogue amplifier ICs within a feedback loop.
    You need to check both temperature drift and= noise=20 with multiplier circuits.
    Check Karl and Allan's circuits on psn and Ra= ndall=20 Peters' websites?
    I hope that this helps.
 
    Regards,
 
    Chris Chapman

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